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? semiconductor components industries, llc, 2006 september, 2006 ? rev. 2 1 publication order number: nthd3102c/d nthd3102c power mosfet complementary, 20 v, +5.5 a /?4.2 a, chipfet features ? complementary n?channel and p?channel mosfet ? small size, 40% smaller than tsop?6 package ? leadless smd package provides great thermal characteristics ? leading edge trench technology for low on resistance ? reduced gate charge to improve switching response ? this is a pb?free device applications ? dc?dc conversion circuits ? load/power switching ? single or dual cell li?ion battery supplied devices ? ideal for power management applications in portable, battery powered products maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain?to?source v oltage v dss 20 v gate?to?source v oltage n?ch v gs 8.0 v p?ch 8.0 n?channel continuous drain current (note 1) stead y state t a = 25 c i d 4.0 a t a = 85 c 2.9 t 5 s t a = 25 c 5.5 p?channel continuous drain current (note 1) stead y state t a = 25 c i d 3.1 a t a = 85 c 2.2 t 5 s t a = 25 c 4.2 power dissipation (note 1) steady state t a = 25 c p d 1.1 w t 5 s 2.1 gate?to?source esd rating ? (human body model, method 3015) esd 100 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. surface?mounted on fr4 board using 1 in sq pad size (cu. area = 1.127 in sq [1 oz] including traces). http://onsemi.com g d s n?channel mosfet 1 1 1 g d 2 2 p?channel mosfet s 2 chipfet case 1206a style 2 1 2 3 4 5 6 7 8 pin connections marking diagram d6 = specific device code m = date code = pb?free package 1 2 3 4 8 7 6 5 s 1 g 1 s 2 g 2 d 1 d 1 d 2 d 2 (bottom view) (top view) n?channel 20 v p?channel ?20 v 37 m @ 2.5 v 29 m @ 4.5 v 64 m @ 4.5 v 83 m @ 2.5 v r ds(on) typ 5.5 a ?4.2 a i d max (note 1) v (br)dss 48 m @ 1.8 v 105 m @ 1.8 v see detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ordering information d6 m
nthd3102c http://onsemi.com 2 maximum ratings (continued) (t j = 25 c unless otherwise noted) parameter symbol value unit n?channel continuous drain current (note 3) steady state t a = 25 c i d 3.0 a t a = 85 c 2.2 p?channel continuous drain current (note 3) steady state t a = 25 c i d 2.3 a t a = 85 c 1.7 power dissipation (note 3) t a = 25 c p d 0.6 w pulsed drain current n?ch tp = 10 s i dm 16 a p?ch 12.6 operating junction and storage temperature t j , t stg ?55 to 150 c source current (body diode) i s 1.7 a lead temperature for soldering purposes (1/8 from case for 10 seconds) t l 260 c thermal resistance ratings parameter symbol max unit junction?to?ambient ? steady state (note 2) r ja 110 c/w junction?to?ambient ? t 5 s (note 2) 60 junction?to?ambient ? steady state (note 3) 195 electrical characteristics (t j = 25 c unless otherwise noted) parameter symbol n/p test conditions min typ max unit off characteristics drain?to?source breakdown voltage (note 4) v (br)dss n v gs = 0 v i d = 250 a 20 v p i d = ?250 a ?20 drain?to?source breakdown voltage temperature coefficient v (br)dss /t j n 20.2 mv/ c p 16.2 zero gate voltage drain current i dss n v gs = 0 v, v ds = 16 v t j = 25 c 1.0 a p v gs = 0 v, v ds = ?16 v ?1.0 n v gs = 0 v, v ds = 16 v t j = 85 c 5.0 p v gs = 0 v, v ds = ?16 v ?5.0 gate?to?source leakage current i gss n v ds = 0 v, v gs = 8.0 v 100 na p v ds = 0 v, v gs = 8.0 v 100 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 2. surface?mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [1 oz] including traces). 3. surface?mounted on fr4 board using the minimum recommended pad size (cu area = tbd in sq). 4. switching characteristics are independent of operating junction temperatures.
nthd3102c http://onsemi.com 3 electrical characteristics (continued) (t j = 25 c unless otherwise noted) parameter symbol n/p test conditions min typ max unit on characteristics (note 5) gate threshold voltage v gs(th) n v gs = v ds i d = 250 a 0.4 1.2 v p i d = ?250 a ?0.4 ?1.2 drain?to?source on resistance r ds(on) n v gs = 4.5 v , i d = 4.4 a 29 45 m p v gs = ?4.5 v , i d = ?3.2 a 64 80 n v gs = 2.5 v , i d = 4.1 a 37 50 p v gs = ?2.5 v, i d = ?2.5 a 83 110 n v gs = 1.8 v , i d = 1.9 a 48 70 p v gs = ?1.8 v, i d = ?0.6 a 105 150 forward transconductance g fs n v ds = 10 v, i d = 4.4 a 7.7 s p v ds = ?10 v , i d = ?3.2 a 5.9 charges, capacitances and gate resistance input capacitance c iss n f = 1.0 mhz, v gs = 0 v v ds = 10 v 510 pf p v ds = ?10 v 650 output capacitance c oss n v ds = 10 v 100 p v ds = ?10 v 100 reverse transfer capacitance c rss n v ds = 10 v 50 p v ds = ?10 v 50 total gate charge q g(tot) n v gs = 4.5 v, v ds = 10 v, i d = 4.4 a 5.8 7.9 nc p v gs = ?4.5 v, v ds = ?10 v, i d = ?3.2 a 6.6 8.9 threshold gate charge q g(th) n v gs = 4.5 v, v ds = 10 v, i d = 4.4 a 0.96 p v gs = ?4.5 v, v ds = ?10 v, i d = ?3.2 a 0.98 gate?to?source charge q gs n v gs = 4.5 v, v ds = 10 v, i d = 4.4 a 1.2 p v gs = ?4.5 v, v ds = ?10 v, i d = ?3.2 a 1.4 gate?to?drain charge q gd n v gs = 4.5 v, v ds = 10 v, i d = 4.4 a 1.56 p v gs = ?4.5 v, v ds = ?10 v, i d = ?3.2 a 1.64 switching characteristics (note 6) turn?on delay time t d(on) n v gs = 4.5 v, v dd = 10 v, i d = 4.4 a, r g = 2.5 7.2 ns rise time t r 15.9 turn?off delay time t d(off) 15.7 fall time t f 4.6 turn?on delay time t d(on) p v gs = ?4.5 v, v dd = ?10 v, i d = ?3.2 a, r g = 2.5 6.4 rise time t r 16.9 turn?off delay time t d(off) 16.4 fall time t f 15.0 5. pulse test: pulse width 300 s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures.
nthd3102c http://onsemi.com 4 electrical characteristics (continued) (t j = 25 c unless otherwise noted) parameter symbol n/p test conditions min typ max unit drain?source diode characteristics forward diode voltage v sd n v gs = 0 v, t j = 25 c i s = 1.7 a 0.68 1.2 v p i s = ?1.7 a ?0.7 ?1.2 reverse recovery time t rr n v gs = 0 v, di s / dt = 100 a/ s i s = 1.7 a 13.5 ns p i s = ?1.7 a 12.6 charge time t a n i s = 1.7 a 8.6 p i s = ?1.7 a 8.4 discharge time t b n i s = 1.7 a 4.9 p i s = ?1.7 a 4.2 reverse recovery charge q rr n i s = 1.7 a 7.0 nc p i s = ?1.7 a 6.0
nthd3102c http://onsemi.com 5 typical n?channel performance curves (t j = 25 c unless otherwise noted) 125 c 0 8 5 6 6 3 2 v ds , drain?to?source voltage (volts) i d, drain current (amps) 4 2 0 1 figure 1. on?region characteristics 0 8 1.6 1.2 6 4 2 0.8 0 figure 2. transfer characteristics v gs , gate?to?source voltage (volts) 8 0.02 0.04 figure 3. on?resistance vs. drain current i d, drain current (amps) r ds(on), drain?to?source resistance ( ) i d, drain current (amps) figure 4. on?resistance vs. drain current and temperature ?50 0 ?25 25 1.4 1.2 1.0 0.8 0.6 50 125 100 figure 5. on?resistance vs. drain current t j , junction temperature ( c) t j = 25 c 24 t j = ?55 c t j = 25 c 75 15 0 i d = 4 a v gs = 4.5 v r ds(on), drain?to?source resistance (normalized) 4 25 c 1.6 10 6 figure 6. on?resistance variation with temperature 1.4 v 1.6 v 78 v gs = 8 v to 1.8 v 910 0.4 0 1.2 v 1.0 v 2.0 0.08 0.06 v gs = 4.5 v t j = ?55 c t j = 125 c 8 0.06 0.04 i d, drain current (amps) r ds(on), drain?to?source resistance ( ) 24 t j = 25 c 1 0 6 0 0.02 0.08 v gs = 2.5 v t j = ?55 c t j = 125 c 8 0.044 0.02 i d, drain current (amps) r ds(on), drain?to?source resistance ( ) 24 t j = 25 c 10 6 0 0.036 0.028 v gs = 4.5 v v gs = 2.5 v
nthd3102c http://onsemi.com 6 typical n?channel performance curves (t j = 25 c unless otherwise noted) v gs = 0 v 010 1000 600 400 200 0 20 gate?to?source or drain?to?source voltage (volts) figure 7. gate?to?source and drain?to?source voltage vs. total charge c, capacitance (pf) figure 8. diode forward voltage vs. current q g , total gate charge (nc) v gs, gate?to?source voltage (volts) t j = 25 c c oss c iss c rss 10 1 10 1 100 r g , gate resistance (ohms) figure 9. threshold voltage t, time (ns) v ds = 10 v i d = 4.4 a v gs = 4.5 v 100 5 t d(off) t d(on) t f t r 15 0.01 v sd , source?to?drain voltage (volts) figure 10. resistive switching time variation vs. gate resistance i s , source current (amps) v gs = 0 v t j = 25 c 0.2 0 1 0.1 0.8 0.4 10 0 1 2 3 4 5 02468 i d = 4.4 a t j = 25 c 0.6 figure 11. capacitance variation v gs(th) , threshold variance (v) ?50 0 ?25 25 0 ?0.1 ?0.2 ?0.3 ?0.4 50 125 100 t j , junction temperature ( c) 75 150 i d = 250 a 0.2 0.1 800 t j = 25 c t j = 125 c
nthd3102c http://onsemi.com 7 typical p?channel performance curves (t j = 25 c unless otherwise noted) 125 c 0 8 5 6 6 3 2 ?v ds , drain?to?source voltage (volts) ?i d, drain current (amps) 4 2 0 1 figure 12. on?region characteristics 0 8 1.6 1.2 2.4 6 4 2 0.8 0 2. 8 figure 13. transfer characteristics ?v gs , gate?to?source voltage (volts) 8 0.1 0.05 0.04 figure 14. on?resistance vs. drain current ?i d, drain current (amps) r ds(on), drain?to?source resistance ( ) ?i d, drain current (amps) figure 15. on?resistance vs. drain current and temperature ?50 0 ?25 25 1.4 1.2 1.0 0.8 0.6 50 125 100 figure 16. on?resistance vs. drain current t j , junction temperature ( c) t j = 25 c 0.09 24 t j = ?55 c t j = 25 c 75 15 0 i d = ?4 a v gs = ?4.5 v r ds(on), drain?to?source resistance (normalized) 4 25 c 1.6 10 6 figure 17. on?resistance variation with temperature ?1.4 v ?1.6 v ?1.8 v 78 ?2 v v gs = ?8 v to ?4 v 910 0.4 0 ?1.2 v ?1.0 v 2.0 0.08 0.07 0.06 v gs = ?4.5 v t j = ?55 c t j = 125 c 8 0.16 0.06 0.04 ?i d, drain current (amps) r ds(on), drain?to?source resistance ( ) 0.14 24 t j = 25 c 1 0 6 0 0.12 0.10 0.08 v gs = ?2.5 v t j = ?55 c t j = 125 c 8 0.1 0.05 0.04 ?i d, drain current (amps) r ds(on), drain?to?source resistance ( ) 0.09 24 t j = 25 c 10 6 0 0.08 0.07 0.06 v gs = ?4.5 v v gs = ?2.5 v
nthd3102c http://onsemi.com 8 typical p?channel performance curves (t j = 25 c unless otherwise noted) v gs = 0 v 8 012 800 600 400 200 0 20 gate?to?source or drain?to?source voltage (volts) figure 18. gate?to?source and drain?to?source voltage vs. total charge c, capacitance (pf) figure 19. diode forward voltage vs. current q g , total gate charge (nc) ?v gs, gate?to?source voltage (volts) t j = 25 c c oss c iss c rss 10 1 10 1 100 r g , gate resistance (ohms) figure 20. threshold voltage t, time (ns) v ds = ?10 v i d = ?4.2 a v gs = ?4.5 v 100 4 t d(off) t d(on) t f t r 16 0.01 ?v sd , source?to?drain voltage (volts) figure 21. resistive switching time variation vs. gate resistance ?i s , source current (amps) v gs = 0 v t j = 25 c 0.4 0.2 1 0.1 1.0 0.6 10 0 1 2 3 4 5 02468 i d = ?3.2 a t j = 25 c 0.8 figure 22. capacitance variation ?v gs(th) , threshold variance (v) ?50 0 ?25 25 0 ?0.1 ?0.2 ?0.3 ?0.4 50 125 100 t j , junction temperature ( c) 75 150 i d = ?250 a 0.2 0.1 t j = 25 c t j = 125 c
nthd3102c http://onsemi.com 9 figure 23. thermal response typical performance curves (t j = 25 c unless otherwise noted) 2 1 0.1 0.01 10 10 10 ?4 ?3 ?2 ?1 10 1 10 100 600 square wave pulse duration (sec) normalized effective transient thermal impedance duty cycle = 0.5 0.2 single pulse 0.1 0.05 0.02 1. duty cycle, d = 2. per unit base = r thja = 90 c/w 3. t jm ? t a = p dm z ja (t) 4. surface mounted t 1 t 2 p dm notes: t 1 t 2 ordering information device package shipping ? NTHD3102CT1G chipfet (pb?free) 3000 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d.
nthd3102c http://onsemi.com 10 package dimensions chipfet case 1206a?03 issue g 0.457 0.018 2.032 0.08 0.635 0.025 0.66 0.026 0.711 0.028 mm inches scale 20:1 0.457 0.018 2.032 0.08 0.635 0.025 0.66 0.026 0.254 0.010 mm inches scale 20:1 1.092 0.043 0.178 0.007 basic style 2 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* style 2: pin 1. source 1 2. gate 1 3. source 2 4. gate 2 5. drain 2 6. drain 2 7. drain 1 8. drain 1 e a b e e1 d 1234 8765 c l 1 2 3 4 8 7 6 5 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. mold gate burrs shall not exceed 0.13 mm per side. 4. leadframe to molded body offset in horizontal and vertical shall not exceed 0.08 mm. 5. dimensions a and b exclusive of mold gate burrs. 6. no mold flash allowed on the top and bottom lead surface. 0.05 (0.002) dim a min nom max min millimeters 1.00 1.05 1.10 0.039 inches b 0.25 0.30 0.35 0.010 c 0.10 0.15 0.20 0.004 d 2.95 3.05 3.10 0.116 e 1.55 1.65 1.70 0.061 e 0.65 bsc e1 0.55 bsc l 0.28 0.35 0.42 0.011 0.041 0.043 0.012 0.014 0.006 0.008 0.120 0.122 0.065 0.067 0.025 bsc 0.022 bsc 0.014 0.017 nom max 1.80 1.90 2.00 0.071 0.075 0.079 h e 5 nom 5 nom h e
nthd3102c http://onsemi.com 11 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, r epresentation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5773?3850 nthd3102c/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative chipfet is a trademark of vishay siliconix.

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